Due to the rapid growth of the AI market, high performance, low power, and high reliability are required for semiconductors at the same time, and precise quality control across design, process, and manufacturing is essential to realize this. Among them, particle acts as a representative defect factor and is continuously studied as a key cause of poor yield and reliability. Semiconductor defects are classified into three categories: device characteristics (parametric), process/design characteristics (systematic), and byproducts (random). In the past, defect was defined as random defects due to particle to control physical removal oriented control, but depending on process complexity and miniaturization, existing definitions alone are limited, and it is necessary to expand and understand and control defect from a systematic perspective. Currently, the defect control system is upgrading removal technologies such as clean and filtration, creation, and control technologies that prevent wafer transcription as key indicators of the number of defects per unit area (D0). However, the limitations are becoming clear only with the existing approach, and in particular, as the number of fine defects that are difficult to detect with the existing inspection system is increasing, high resolution inspection infrastructure and precision control technology that can detect and control them are essential. In this lecture, we will point out the limitations of the existing defect concept and present a new defect control paradigm for the next-generation AI memory market.
In semiconductor manufacturing, various types of contamination cause yield reduction. As an introduction, the effects of contamination on semiconductor devices will be presented. Based on that, semiconductor cleaning will be explained. Wet cleaning, recent cleaning, and cleaning for specific purposes will be explained in detail. Contamination control technologies other than cleaning will be introduced. Finally, next-generation contamination control issues and cleaning and drying technologies will be explained. We will teach contamination control technologies other than cleaning, monitoring technologies, wafer surface analysis technologies, and optimal factory design.
Cleanroom is the lifeline for ensuring semiconductor production yield, but the complex environment control of cross operations, high energy consumption, and high cost have always been industry challenges. In the field of electronic semiconductor manufacturing, the stable operation and energy consumption management of cleanroom ventilation systems have always been a difficult point that the industry pays attention to but neglects. How to achieve energy conservation and consumption reduction while ensuring high yield? How to solve the pain points of clean room operation through scientific management and technological innovation? Where does clean room energy consumption come from? How to quantify analysis? How to achieve a balance between operational management and process yield through data-driven approaches? This speech will start from practical cases and elaborate on the core concept and technical path of energy saving and consumption reduction in semiconductor cleanroom ventilation systems. It points out how to choose suitable filter products and optimize clean room operation management strategies through data analysis, achieving a dynamic balance between energy consumption and cleanliness. In short, energy conservation is not simply about replacing equipment, but about the full chain technology integration from diagnosis, design, selection to operation and maintenance.
General Manager of SHENZHEN ESKY Purify Technology Co., LtdInternationally Certified Cleanroom Engineer accredited by ICEB (International Cleanroom Education Board)Member of ICCCS (International Confederation of Contamination Control Society)Vice Chairman of the Cleanroom Technology Committee, Chinese Institute of ElectronicsPresident of the Standardization Professional Committee, Shenzhen Bio-Industrial Cleanroom Industry AssociationMember of the Laboratory Construction and Development Branch, National Association of Health Industry Enterprise Management
The group standard, Guidelines for airborne chemical contamination control of laboratories, initiated by QUNYAN XIA, was officially implemented on June 20, 2024, filling the gap in chemical pollution control for laboratories in China. Additionally, QUNYAN XIA is co-editing the national standard, Services specification for operation and maintenance for clean rooms and associated controlled environments.
For the last three decades, the development of IntegratedCircuit (IC) technology has significantly changed our living style. The success of minimization of IC is majorly due to the dramatically reduction of Technology Node (from 800~200 nm in 1990s to 5nm or even smaller now). In the manufacturing process, the challenges of contamination control on a silicon wafer are much more rigorous and important. The possible contaminants during the fabrication processes or the storage of wafer/mask in a container are particle, oxygen, moisture, and airborne molecular contamination (AMC) etc., which might significantly cause yield reduction and performance deterioration of the device. The semiconductor manufacturing processes are also very energy-intensive. A typical 300 mm wafer fab uses around several billion kWh annually in electricity (as much as 500,000 home uses). In this talk, challenges on the contamination control for the next generation node will be highlighted. Several qualified new installations in Taiwan fabrication plants (fabs) will be reported. Key possible approaches to improve energy efficiency will also be discussed. Finally, some successful examples will be presented.
Dr. Shih-Cheng is a Chair and Life Distinguished Professor at National Taipei University of Technology (NTUT). Prof. Hu is one of the renowned researchers in the field of energy and contamination in semiconductor manufacturing facilities. His novel innovation "a total solution on humidity/oxygen control for wafer automatic handling system” has been imbedded and became a standard-installation for sub. 7nm process wafer/tool interface equipment utilized today. Prof. Hu is the key founder of the Taiwan Cleaning Technology Association (TCTA) and was the president of TCTA from 2013 to 2016. He is the major co-author of the book “American Society of Heating, Refrigerating and Air-Conditioning Engineers (ASHRAE) Cleanroom Design Guide”, with 21 chapters/425 pages. He has received many University/Government awards include the National Award for Distinguished Contribution to Industry-Academia Cooperation, a top award arranged by the Ministry of Education of TAIWAN government in 2023. He is a Fellow grade member of the ASHRAE.
